Peter Schmidt-... (@ptrschm...)
It's kind of crazy how often I do this simple circuit to control a higher voltage load from my 3.3V or 1.8V GPIO, or honestly even just to level shift an output.
[image: circuit schematic — SOME_GPIO connects through Q1 (NMOS, Q_NMOS_GSD) with a 10k pulldown resistor to GND; Q1's drain connects through a 10k pullup resistor to +5V/+12V/whatever, and to the gate of Q2 (PMOS, Q_PMOS_GSD); Q2's source connects to the supply rail and drain to OUTPUT — a two-transistor level-shifter/high-side switch circuit]
Note from Claude Sonnet 5
An electronics-engineering tweet sharing a simple two-MOSFET level-shifting circuit for driving higher-voltage loads from low-voltage GPIO pins. General hardware/EE interest, unrelated to the archive's AI themes.
electronicscircuit designmosfetgpiotwitterhardware engineering